1. Field of the Invention
The present invention relates to a flash memory device and associated charge pump circuit.
2. Description of the Related Art
Semiconductor memory devices are devices in which data can be stored and from which stored data can be retrieved. Semiconductor memory devices can be classified into random access memory (RAM) and read only memory (ROM). RAM is a volatile memory that needs power supply to retain data. ROM is a nonvolatile memory that can retain data even when power is removed. Examples of RAM are a dynamic RAM (DRAM) and a static RAM (SRAM). Examples of ROM are a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), and a flash memory.
Both ROM and RAM are high density, being able to store high amounts of data in relatively small spaces. However, both ROM and RAM typically consume large amounts of power. To address this issue, a solution for low-power, high-density, easily programmable non-volatile memory is flash memory. Flash memory is ideal for portable devices that require large storage capacity. FIG. 1 shows a block diagram of a conventional flash memory device 10. The flash memory device 10 comprises a row decoder 12, a column decoder 14, and a flash memory cell array 16. The row decoder 12 and the column decoder 14 function by applying a word line voltage and a bit line voltage, respectively, to a given cell of the memory cell array 16.
Because the flash memory device 10 receives a single supply voltage VCC and the word lines and bit lines of the memory cell array 16 require different driving voltages in operation, multiple voltage boosters or, more commonly, charge pumps are required to provide voltages greater than the supply voltage VCC. Referring to FIG. 1, a charge pump 18 outputs a boosting voltage VPP to the row decoder 12 and a charge pump 19 outputs a boosting voltage VDD to the column decoder 14. The charge pumps 18 and 19 are generally comprised of a plurality of booster stages cascaded between the input and the output of the charge pump, wherein each booster stage contains a boost capacitor with a high capacitance. The addition of the charge pumps 18 and 19 result in a significant increase in chip area and power consumption. Based on the above, there is a need to provide an improved flash memory device comprising fewer charge pump circuits.